
@Copyright 1996
All Rights Reserved.
Manual first edition
20, June. 1996
The information in this document is subject to change without prior notice in order to improve reliability, design and function and does not represent a commitment on the part of the manufacturer.
In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages.
This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer.
Trademarks
ACL-8216 is registered trademarks of ADLink Technology Inc., IBM PC is a registered trademark of International Business Machines
Corporation. Intel is a registered trademark of Intel Corporation. Other product names mentioned herein are used for identification purposes only and may
be trademarks and/or registered trademarks of their respective companies.
Contents
This manual is designed to help you use the ACL-8216. The manual describes how to modify various settings on the ACL-8216 card to meet your requirements. It is divided into six chapters:
The ACL-8216 is a high performance, high resolution multi-function data acquisition card for the IBM PC or compatible computers.
The ACL-8216 series is designed to combine all the data acquisition functions, such as A/D, D/A, DIO, and timer/counter in a single board, The high-end specifications of the card makes it ideal for wide range of applications requiring high resolution 16-bit data acquisition at low cost. The Figure 1.1 shows the block diagram of the ACL-8216.
The ACL-8216 Series features 16 single-ended inputs or 8 differential inputs at up to 60 Khz, 2 channels multiplying 12-bit double-buffered analog output, 16 digital inputs and 16 digital outputs, and one timer/counter channel.
The ACL-8216 High Resolution Multi-function Data Acquisition Card provides the following advanced features:
¨ Analog Input (A/D)
This chapter describes how to install the ACL-8216. At first, the contents in the package and unpacking information that you
should care about are described. The jumpers and switches setting for the ACL-8216's base address, analog input channel
configuration, interrupt IRQ level, voltage source, etc. are also specified.
2.1 What You Have
In addition to this User's Manual, the package includes the following items:
If any of these items is missing or damaged, contact the dealer from whom you purchased the product. Save the shipping
materials and carton in case you want to ship or store the product in the future.
2.2 Unpacking
Your ACL-8216 card contains sensitive electronic components that can be easily damaged by static electricity.
The card should be done on a grounded anti-static mat. The operator should be wearing an anti-static wristband, grounded at the same point as the anti-static mat.
Inspect the card module carton for obvious damage. Shipping and handling may cause damage to your module. Be sure there are no shipping and handing damages on the module before processing.
After opening the card module carton, extract the system module and place it only on a grounded anti-static surface component side up.
Again inspect the module for damage. Press down on all the socketed IC's to make sure that they are properly seated. Do this only with the module place on a firm flat surface.
Note : DO NOT APPLY POWER TO THE CARD IF IT HAS BEEN DAMAGED.
You are now ready to install your ACL-8216.
2.3 ACL-8216's Layout

Figure 2.1 PCB Layout of the ACL-8216
2.4 Jumper and DIP Switch Description
You can change the ACL-8216's channels and the base address by setting jumpers and DIP switches on the card. The card's jumpers and switches are preset at the factory. You can change the jumper settings for your own applications.
A jumper switch is closed (sometimes referred to as "shorted") with the plastic cap inserted over two pins of the jumper. A jumper
is open with the plastic cap inserted over one or no pin(s) of the jumper.
2.5 Base Address Setting
The ACL-8216 requires 16 consecutive address locations in the I/O address space. The base address of the ACL-8216 is restricted by the following conditions.
The ACL-8216's base address of registers is selected by an 6 positions DIP switch SW1. The default setting of base address is set to be HEX 220. All possible base address combinations are listed as Table 2.2. You may modify the base address if the address HEX 220 has been occupied by another add-on card.

Figure 2.2 Default Base Address Setting
| I/O port Address(Hex) |
1 A8 |
2 A7 |
3 A6 |
4 A5 |
5 A4 |
6 |
| 000-00F | ON (0) |
ON (0) |
ON (0) |
ON (0) |
ON (0) |
X |
| 010-21F | ON (0) |
ON (0) |
ON (0) |
ON (0) |
OFF (1) |
X |
| : | : | : | : | : | : | X |
| 210-21F | ON (0) |
ON (0) |
ON (0) |
ON (0) |
OFF (1) |
X |
| 220-22F (default) |
ON (0) |
ON (0) |
ON (1) |
OFF (1) |
ON (0) |
X |
| 230-23F | ON (0) |
ON (0) |
ON (0) |
OFF (1) |
OFF (1) |
X |
| : | X | |||||
| 300-30F | OFF (1) |
ON (0) |
ON (0) |
ON (0) |
ON (0) |
X |
| : | X | |||||
| 3F0-3FF | OFF (1) |
OFF (1) |
OFF (1) |
OFF (1) |
OFF (1) |
X |
A0, ..., A9 is corresponding to PC Bus address lines
A9 is always set as "1".
Table 2.2 Possible Base Address Combinations
How to define the base address for the ACL-8216 ?
The DIP1 to DIP6 in the switch SW1 are one to one corresponding to the PC bus address line A8 to A4. A0~A3 are always 0, and A9
is always 1. If you want to change the base address, you can only change the values of A8 to A4 (the shadow area of below table).
The following table is an example, which shows you how to define the base address as
Hex 220
Base Address : Hex 220
| 2 | 2 | 0 | |||||||
| 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 |
| A9 | A8 | A7 | A6 | A5 | A4 | A3 | A2 | A1 | A0 |
The ACL-8216 offer 16 single-ended or 8 differential analog input channels. The jumper JP4 controls the analog input channel configuration. The settings of JP4 is specified as following illustration.

Figure 2.3 Analog Input Channels Configuration
2.7 DMA Channel Setting
The A/D data transfer of ACL-8216 is designed with DMA transfer capability. The setting of DMA channel 1 or channel 3 is controlled by the jumpers JP8 and JP9. The possible settings are shown below.
Note : On floppy disk only machine, we suggest you to set DMA level 3. If you have hard disk equipped computer, level 1 is preferable.

Figure 2.4 DMA Channel Setting
2.8 Internal/External Trigger Setting
The A/D conversion trigger source of ACL-8216 comes from internal or external. The internal or external trigger source is setting by JP5, as shown on Figure 2.5. Note that there are two internal on-board trigger sources, one is the software trigger and the other is the programmable pacer trigger, which is controlled by the mode control register(see section 4.5).

Figure 2.5 Trigger Source Setting

Figure 2.6 Timer's Clock Source Setting
2.9 Clock Source Setting
The 8254 programmable interval timer is used in the ACL-8216. It provides 3 independent channels of 16-bit programmable
down counters. The input of counter 2 is connected to a precision 2MHz oscillator for internal pacer. The input of counter 1 is
cascaded from the output of counter 2. The channel 0 is free for user's applications. There are two selections for the clock source of
channel 0 : the internal 2MHz clock or the external clock signal from connector CN3 pin 37. The setting of clock is shown as Figure 2.6.
2.10 IRQ Level Setting
The ACL-8216 can connect to any one of the interrupt lines of the PC I/O channel. The interrupt line is selected by the jumper JP7. If you wish to use the interrupt capability of ACL-8216, you must select an interrupt level and place the jumper in the appropriate position to enable the particular interrupt line.
The default interrupt level is IRQ15, which is selected by placing the jumper on the pins in row number 15. Figure 2.7 shows the default interrupt jumper setting IRQ15. You only remove the jumper from IRQ15 to other new pins, if you want to change to another IRQ level.
Note : Be aware that there is no other add-on card shares the same interrupt level at the same system.

Figure 2.7 IRQ Level Setting
2.11 D/A Reference Voltage Setting
The D/A converter's reference voltage source can be internal or external generated. The external reference voltage comes from connector CN3 pin 31(ExtRef1) and pin12(ExtRef2), see section 3.1. The reference source of D/A channel 1 and channel 2 are selected by JP2 and JP3, respectively. Their possible settings are shown as below:

Figure 2.8 D/A Voltage Setting
The internal voltage is -5V or -10V which can is selected by JP1. The possible configurations are specified as Figure 2.9. Note that the internal reference voltage is used only when the JP2 or JP3 is set to internal reference.

Figure 2.9 Internal Reference Voltage Setting
3. Signal Connections
This chapter describes the connector of the ACL-8216, also the signal connection between the ACL-8216 and external
devices, such as daughter boards or other devices.
3.1 Connectors Pin Assignment
The ACL-8216 comes equipped with two 20-pin insulation displacement connectors - CN1 and CN2 and one 37-pin D-type connector - CN3. The CN1 and CN2 are located on board and CN3 located at the rear plate.
CN1 is used for digital signal input, CN2 for digital signal output, CN3 for analog input, analog output and timer/counter's signals. The pin assignment for each connectors are illustrated in the Figure 3.1 ~ Figure 3.3.
· CN 1: Digital Signal Input (DI 0 - 15 )

Figure 3.1. Pin Assignment of CN1
· CN 2: Digital Signal Output (DO 0 - 15 )

Figure 3.2. Pin Assignment of CN2
Legend :
DO n : Digital output signal channel n
DI n : Digital input signal channel n
GND : Digital ground
· CN 3 : Analog Input/Output & Counter/Timer
( for single-ended connection)

Figure 3.3a. Pin Assignment of CN3
· CN 3 : Analog Input/Output & Counter/Timer
( for differential connection)

Figure 3.3b. Pin Assignment of CN3
Legend :
AIn : Analog Input Channel n ( single-ended)
AIHn : Analog High Input Channel n ( differential)
AILn : Analog Low Input Channel n ( differential)
ExtRef n : External Reference Voltage for D/A CH n
AOn : Analog Output Channel n
ExtCLK : External Clock Input
ExtTrig : External Trigger Signal
CLK : Clock input for 8254
GATE : Gate input for 8254
COUT n : Signal output of Counter n
V.ERF : Voltage Reference
A.GND : Analog Ground
GND : Ground
3.2 Analog Input Signal Connection
The ACL-8216 provides 16 single-ended or 8 differential analog input channels. The analog signal can be converted to digital value by the A/D converter. To avoid ground loops and get more accuracy measurement of A/D conversion, it is quite important to understand the signal source type and how to choose the analog input modes : signal-ended and differential. The ACL-8216 offers jumpers to select 16 single-ended or 8 different analog inputs.
Single-ended Mode :
The single-ended mode has only one input relative to ground and it suitable for connecting with the floating signal source. The floating source means it does not have any connection to ground. Figure 3.4 shows the single-ended connection. Note that when more than two floating sources are connected, the sources must be with common ground.

Figure 3.4 Floating source and single-ended
Differential input mode
The differential input mode provides two inputs that respond to the difference signal between them. If the signal source has one side connected to local ground, the differential mode can be used for reducing ground loop. Figure 3.5 shows the connection of the differential input mode. However, even if the signal source is local grounded, the single-ended still can be used when the Vcm ( Common Mode Voltage) is very small and the effect of ground loop can be negated.

Figure 3.5 Ground source and differential input
A differential mode must be used when the signal source is differential. A differential source means the ends of the signal are not grounded. To avoid the danger of high voltage between the local ground of signal and the ground of the PC system, a shorted ground path must be connected. Figure 3.6 shows the connection of differential source.

Figure 3.6 Differential source and differential input
If your signal source is both floating and local ground, you should use the differential mode, and the floating signal source should be connected as the Figure 3.7 .

Figure 3.7 Floating source and differential input
3.3 Analog Output Signal Connection
The ACL-8216 has two unipolar analog output channels. To make the D/A output connections from the appropriate D/A output, please refer Figure 3.7.

Figure 3.7 Connection of Analog Output Connection
3.4 Digital I/O Connection
The ACL-8216 provides 16 digital input and 16 digital output channels through the connector CN1 and CN2 on board. The digital I/O signal are fully TTL/DTL compatible. The detailed digital I/O signal specification can be referred in section 1.3.

Figure 3.8 Digital I/O Connection
3.5 Timer / Counter Connection
The ACL-8216 has an interval timer/counter 8254 on board. It offers 3 independent 16-bit programmable down counters; counter 1 and counter 2 are cascaded together for A/D timer pacer trigger of A/D conversion. and counter 0 is free for your applications. Figure 3.9 shows the 8254 timer/counter connection.

Figure 3.9 Block Diagram of 8254 Timer/Counter
The clock source of counter 0 can be internal or external, while the gate can be controlled externally and the output is send to
the connector CN3. As to counter 0 and counter 1, the clock source is internally fixed, while the gate can be controlled
externally and the output is send to the connector CN3 too. All the timer/ counter signals are TTL compatible.
3.6 Daughter Board Connection
The ACL-8216 can be connected with five different daughter boards, ACLD-8125, ACLD-9137, 9182, 9185, and 9188. The
functionality and connections are specified as follows.
3.6.3 Connect with ACLD-8125
The ACLD-8125 has a 37-pin D-sub connector, which can connect with ACL-8216 through 37-pin assemble cable. The most
outstanding feature of this daughter board is a CJC ( cold junction compensation) circuit on board. You can directly connect
the thermocouple on the ACL-8125 board.
3.6.4 Connect with ACLD-9137
The ACLD-9137 is a direct connector for the card which is equipped with 37-pin D-sub connector. This board provides a simple
way for connection. It is very suitable for the simple applications that do not need complex signal condition before the A/D conversion
is performed.
3.6.5 Connect with ACLD-9182
The ACLD-9182 is a 16 channel isolated digital input board. This board is connected with CN1 of ACL-8216 via 20-pin flat
cable. The advantage of board is an 500Vdc isolation voltage is provided, and it can protect your PC system from damage when
an abnormal input signal is occurred.
3.6.6 Connect with ACLD-9185
The ACLD-9185 is a 16 channel SPDT relay output board. This board is connected with CN2 of ACL-8216 via 20-pin flat cable.
by using this board, you can control outside device through the digital output signals.
3.6.7 Connect with ACLD-9188
ACLD-9188 is a general purpose terminal board for all the card which comes equipped with 37-pin D-sub connector.
4. Registers Structure & Format
The detailed descriptions of the register format and structure of the ACL-8216 are specified in this chapter. This information is quite useful for the programmer who wish to handle the card by low-level program.
In addition, the low level programming syntax is introduced. This information can help the beginners to operate the ACL-8216 in
the shortest learning time.
4.1 I/O Port Address
The ACL-8216 requires 16 consecutive addresses in the PC I/O address space. The Table 4.1 shows the I/O address of each register with respect to the base address. The function of each register also be shown.
| I/O Address | Read | Write |
| Base + 0 | Counter 0 | Counter 0 |
| Base + 1 | Counter 1 | Counter 1 |
| Base + 2 | Counter 2 | Counter 2 |
| Base + 3 | Not Used | 8254 Counter Control |
| Base + 4 | A/D low byte | CH1 D/A low byte |
| Base + 5 | A/D high byte | CH1 D/A high byte |
| Base + 6 | DI low byte | CH2 D/A low byte |
| Base + 7 | DI high byte | CH2 D/A high byte |
| Base + 8 | Status Control | Clear Interrupt Request |
| Base + 9 | Not Used | A/D Range Control |
| Base + 10 | Not Used | Channel MUX |
| Base + 11 | Not Used | Mode Control |
| Base + 12 | Not Used | Software A/D trigger |
| Base + 13 | Not Used | DO low byte |
| Base + 14 | Not Used | DO high byte |
| Base + 15 | Not Used | Not Used |
Table 4.1 I/O Address
4.2 A/D Data Registers & Status Control Register
The ACL-8216 provides 16 single-ended or 8 differential A/D input channels, the digital data will store in the A/D data registers. The 16 bits A/D data is put into two 8 bits registers. The low byte data (8 LSBs) are put in address BASE+4 and the high byte data is put in address BASE+5. A Status Control Register( Base+8) is used to check if the D/A conversion is ready. An DRDY bit is used to indicate the status of A/D conversion. DRDY goes to low level means A/D conversion is completed.
Address : BASE + 4 and BASE + 5
Attribute : read only
Data Format :
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| BASE+4 | AD7 | AD6 | AD5 | AD4 | AD3 | AD2 | AD1 | AD0 |
| BASE+5 | AD15 | AD14 | AD13 | AD12 | AD11 | AD10 | AD9 | AD8 |
AD15 .. AD0 : Analog to digital data. AD15 is the Most Significant Bit (MSB). AD0 is the Least Significant Bit(LSB).
The A/D converted data is in Binary Two`s Complement data output format. Refer to Table 4.1 for ideal output code.
| Description | Analog Input | Digital Output Binary Two`s Complement |
|
| - | - | Binary Code | Hex Code |
| Full Scale Range | ±10V | - | - |
| Least Signification Bit ( LSB) | 305mV | - | - |
| +Full Scale | 9.999695V | 0111 1111 1111 1111 | 7FFF |
| MidScale | 0V | 0000 0000 0000 0000 | 0000 |
| One LSB below MidScale | -305mV | 1111 1111 1111 1111 | FFFF |
| -Full Scale | -10V | 1000 0000 0000 0000 | 8000 |
Table 4.1 Ideal Input Voltage and Output Code
Address : BASE +8
Attribute : read only
Data Format :
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| BASE+8 | - | - | DRDY | - | - | - | - | - |
DRDY : Data Ready Signal.
1 : A/D data is not ready
0 : A/D conversion is completed.
It will be set to 1, when reading the low byte.
4.3 A/D Channel Multiplexer Register
This register is used to control the A/D channels to be converted. It's a write only register. When the channel number is written to the register, the multiplexer switches to the new channel and await for conversion.
Address : BASE + 10
Attribute : write only
Data Format :
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| BASE+10 | X | X | CS1 | CS0 | CL3 | CL2 | CL1 | CL0 |
CLn : multiplexer channel number.
CL2 is MSB, and CL0 is LSB.
CS0 and CS1 are used to determine which MPC508A chip is selected. The MPC508A is used to multiplex channel from channel, when CS0 is set as 1, the analog input channels from 0 to 7 is selectable, and CS1 is set, the ch 8 to ch 15 can be selectable. When both CS0 and CS1 are set as 1, it means the analog input is differential mode. The possible analog input channel selections are listed as the table below.
| Bit Channel |
7 X |
6 X |
5 CS1 |
4 CS0 |
3 CL3 |
2 CL2 |
1 CL1 |
0 CL0 |
| S.E. CH0 | X | X | 0 | 1 | 0 | 0 | 0 | 0 |
| S.E. CH1 | X | X | 0 | 1 | 0 | 0 | 0 | 1 |
| S.E. CH2 | X | X | 0 | 1 | 0 | 0 | 1 | 0 |
| S.E. CH3 | X | X | 0 | 1 | 0 | 0 | 1 | 1 |
| S.E. CH4 | X | X | 0 | 1 | 0 | 1 | 0 | 0 |
| S.E. CH5 | X | X | 0 | 1 | 0 | 1 | 0 | 1 |
| S.E. CH6 | X | X | 0 | 1 | 0 | 1 | 1 | 0 |
| S.E. CH7 | X | X | 0 | 1 | 0 | 1 | 1 | 1 |
| S.E. CH8 | X | X | 1 | 0 | 1 | 0 | 0 | 0 |
| S.E. CH9 | X | X | 1 | 0 | 1 | 0 | 0 | 1 |
| S.E. CH10 | X | X | 1 | 0 | 1 | 0 | 1 | 0 |
| S.E. CH11 | X | X | 1 | 0 | 1 | 0 | 1 | 1 |
| S.E. CH12 | X | X | 1 | 0 | 1 | 1 | 0 | 0 |
| S.E. CH13 | X | X | 1 | 0 | 1 | 1 | 0 | 1 |
| S.E. CH14 | X | X | 1 | 0 | 1 | 1 | 1 | 0 |
| S.E. CH15 | X | X | 1 | 0 | 1 | 1 | 1 | 1 |
| D.I. CH0 | X | X | 1 | 1 | 0 | 0 | 0 | 0 |
| D.I. CH1 | X | X | 1 | 1 | 0 | 0 | 0 | 1 |
| D.I. CH2 | X | X | 1 | 1 | 0 | 0 | 1 | 0 |
| D.I. CH3 | X | X | 1 | 1 | 0 | 0 | 1 | 1 |
| D.I. CH4 | X | X | 1 | 1 | 0 | 1 | 0 | 0 |
| D.I. CH5 | X | X | 1 | 1 | 0 | 1 | 0 | 1 |
| D.I. CH6 | X | X | 1 | 1 | 0 | 1 | 1 | 0 |
| D.I. CH7 | X | X | 1 | 1 | 0 | 1 | 1 | 1 |
S.E. : Single-ended Analog Input
D.I. : Differential Analog Input
4.4 A/D Range Control Register
The A/D range register is used to adjust the analog input ranges for A/D channels. Two factor will effect the input range : Gain and Bipolar/Unipolar. Both of these issues can be controlled by this register. The Table 4.2 shows the relationship between the register data and the A/D input range.
Address : BASE + 9
Attribute : write only
Data Format :
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| BASE+9 | X | X | X | X | X | X | G1 | G0 |
| G3 | G2 | G1 | G0 | GAIN | Mode | Input Range |
| 0 | 0 | 0 | 0 | 1 | Bipolar | ±10V |
| 0 | 0 | 0 | 1 | 2 | Bipolar | ±5V |
| 0 | 0 | 1 | 0 | 4 | Bipolar | ±2.5V |
| 0 | 0 | 1 | 1 | 8 | Bipolar | ±1.25V |
The A/D operation includes the analog signal conversion and the data transformation. This register controls the internal trigger mode and data transformation method. It is initialized as software trigger and program polling transfer when your PC is reset or power on. The details of the A/D operation is illustrated in Chapter 5. There are four operation modes shown as following .
Address : BASE + 11
Attribute : write only
Data Format :
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| BASE+11 | X | X | X | X | X | S2 | S1 | S0 |
| S2 | S1 | S0 | Operation Mode Description |
| 0 | 0 | 0 | Internal trigger is disable |
| 0 | 0 | 1 | software trigger and program polling (default) |
| 0 | 1 | 0 | timer pacer trigger and DMA transfer |
| 1 | 1 | 0 | timer pacer trigger and interrupt transfer. |
Note:
The Interrupt Status Register is used to clear the interrupt status for next new interrupt can be generated. If the ACL-8216 is in interrupt data transfer mode, a hardware status flag will be set after each A/D conversion. You have to clear the status flag by just writing any data to this register, let the ACL-8216 can generate next interrupt if a new A/D conversion is happen.
Address : BASE + 8
Attribute : write only
Data Format :
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| BASE+8 | X | X | X | X | X | X | X | X |
If you want to generate a trigger pulse to the ACL-8216 for A/D conversion, you just write any data to this register, and then the A/D converter will be triggered.
Address : BASE + 12
Attribute : write only
Data Format :
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| BASE+12 | X | X | X | X | X | X | X | X |
There are 16 digital input channels and 16 digital output channels are provided by the ACL-8216. The address Base + 6 and Base + 7 are used for digital input channels, and the address Base + 13 and Base + 14 are used for digital output channels.
Address : BASE + 6 & BASE + 7
Attribute : read only
Data Format :
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| Base + 6 | DI7 | DI6 | DI5 | DI4 | DI3 | DI2 | DI1 | DI0 |
| Base + 7 | DI15 | DI14 | DI13 | DI12 | DI11 | DI10 | DI9 | DI8 |
Address : BASE + 13 & BASE + 14
Attribute : write only
Data Format :
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| Base + 13 | DO7 | DO6 | DO5 | DO4 | DO3 | DO2 | DO1 | DO0 |
| Base + 14 | DO15 | DO14 | DO13 | DO12 | DO11 | DO10 | DO9 | DO8 |
The D/A converter will convert the D/A output register data to the analog signal. The register data of the address Base + 4 and Base + 5 are used for D/A channel 1, Base +6 and Base +7 are used for D/A channel 2.
Address : BASE + 4 & BASE + 5
Attribute : write only
Data Format : (for D/A Channel 1)
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| Base + 4 | DA7 | DA6 | DA5 | DA4 | DA3 | DA2 | DA1 | DA0 |
| Base + 5 | X | X | X | X | DA11 | DA10 | DA9 | DA8 |
Address : BASE + 6 & BASE + 7
Attribute : write only
Data Format : (for D/A Channel 2)
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| Base + 6 | DA7 | DA6 | DA5 | DA4 | DA3 | DA2 | DA1 | DA0 |
| Base + 7 | X | X | X | X | DA11 | DA10 | DA9 | DA8 |
DA0 is the LSB and DA11 is the MSB of the 12 bits data.
X : don't care
Note : The D/A registers are
"double buffered" so that the D/A analog output signals will not updated until the second
(high) byte is written. This can insure a single step transition when the D/A conversion.
4.10 Internal Timer/Counter Register
Two counter of 8254 are used for periodically triggering the A/D conversion, the left one is left free for user applications. The 8254 occupies 4 I/O address locations in the ACL-8216 as shown blow. Users can refer to NEC's or Intel's data sheet for a full description of the 8254 features, condensed information is specified in Appendix B.
Address : BASE + 0 ~ BASE + 3
Attribute : read / write
Data Format :
| Base + 0 | Counter 0 Register ( R/W) |
| Base + 1 | Counter 1 Register ( R/W) |
| Base + 2 | Counter 2 Register ( R/W) |
| Base + 3 | 8254 CONTROL BYTE |
To operate the ACL-8216, users should understand how to write a hardware dependent low-level program. Using either the
assembly or the high-level language can perform the low-level programming. In Appendix B, the low-level programming syntax is
introduced.
5. Operation Theorem
The operation theorem of the functions on ACL-8216 card is described in this chapter. The functions include the A/D
conversion, D/A conversion, digital I/O and counter / timer. The operation theorem can help you to understand how to manipulate or to
program the ACL-8216.
5.1 A/D Conversion
Before programming the ACL-8216 to perform the A/D conversion, you should understand the following issues:
The A/D conversion is starting by a trigger source, then the A/D converter will start to convert the signal to a digital value. The ACL-8216 provides three trigger modes, see section 5.1.2.
While A/D conversion, the DRDY bit in Status Control register is cleared to indicate the data is not ready. After conversion being completed, the DRDY bit will return to high(1) level. It means users can read the converted data from the A/D data registers. Please refer section 4.2 for the A/D data format.
The A/D data should be transferred into PC's memory for further using. The ACL-8216 provides three data transfer modes that
allow users to optimize the DAS system. Refer to section 5.1.3 for data transfer modes.
5.1.2 A/D Trigger Modes
In the ACL-8216, A/D conversion can be triggered by the Internal or External trigger source. The jumper JP5 is used to select the internal or external trigger, please refer to section 2.8 for details. Whenever the external source is set, the internal sources are disable.
The two internal sources are the software trigger and the timer pacer trigger which is controlled by the A/D operation mode control register (BASE+11). Total three trigger sources are possible in the ACL-8216. The different trigger conditions are specified as follows:
Software trigger
The trigger source is software controllable in this mode. That is, the A/D conversion is starting when any value is written into
the software trigger register (BASE+12). This trigger mode is suitable for low speed A/D conversion. Under this mode, the timing of
the A/D conversion is fully controlled under software. However, it is difficult to control the fixed A/D conversion rate except another
timer interrupt service routine is used to generate a fixed rate trigger.
Timer Pacer Trigger
An on-board timer / counter chip 8254 is used to provide a trigger source for A/D conversion at a fixed rate. Two counters of
the 8254 chip are cascaded together to generate trigger pulse with precise period. Please refer to section 5.4 for 8254 architecture.
This mode is ideal for high speed A/D conversion. It can be combined with the DMA or the interrupt data transfer. It's recommend
to use this mode if your applications need a fixed and precise A/D sampling rate.
External Trigger
Through the pin-17 of CN3 (ExtTrig), the A/D conversion also can be performed when the a rising edge of external signal is
occurred. The conversion rate of this mode is more flexible than the previous two modes, because the users can handle the external signal
by outside device. The external trigger can combine with the DMA transfer, interrupt data transfer, or even program polling
data transfer. Generally, the interrupt data transfer is often used when external trigger mode is used.
5.1.3 A/D Data Transfer Modes
On the ACL-8216, three A/D data transfer modes can be used when the conversion is completed. The data transfer mode is controlled by the mode control register (BASE+11). The different transfer modes are specified as follows:
Software Data Transfer
Usually, this mode is used with software A/D trigger mode. After the A/D conversion is triggered by software, the software should
poll the DRDY bit until it becomes to high level. Whenever the low byte of A/D data is read, the
DRDY bit will be cleared to indicate the data is read out.
It is possible to read A/D converted data without polling. The A/D conversion time will not excess 8ms on ACL-8216 card. Hence, after software trigger, the software can wait for at least 10ms then read the A/D register without polling.
Interrupt Transfer
The ACL-8216 provides hardware interrupt capability. Under this mode, an interrupt signal is generated when the A/D conversion
is ended and the data is ready to be read. It is useful to combine the interrupt transfer with the timer pacer trigger mode. Under
this mode, the data transfer is essentially asynchronous with the control software.
When the interrupt transfer is used, you have to set the interrupt IRQ level by hardware jumper. Please refer section 2.10 for IRQ jumper setting. After the A/D conversion is completed, a hardware interrupt will be inserted and its corresponding ISR (Interrupt Service Routine) will be invoked and executed. The converted data is transferred by the ISR program.
DMA Transfer
The DMA (Direct Memory Access) allows data to be transferred directly between the ACL-8216 and the PC memory at the
fastest possible rate, without using any CPU time. The A/D data is automatically transferred to PC's memory after conversion completed.
The DMA transfer mode is very complex to program. It is recommended to use the high level program library to operate this card.
If you wish to program the software which can handle the DMA data transfer, please refer to more information about 8237
DMA controller.
5.2 D/A Conversion
The operation of D/A conversion is more simple than A/D operation. You only need to write digital values into the D/A data registers and the corresponding voltage will be output from the AO1 or AO2. Refer to section 4.9 for information about the D/A data registers. The mathematical relationship between the digital number DAn and the output voltage is formulated as following:
where the Vref is the reference voltage, the Vout is the output voltage, and the DAn is the digital value in D/A data registers.
Before performing the D/A conversion, users should care about the D/A reference voltage which set by the JP1,JP2 and JP3. Please refer section 2.11 for jumper setting. The reference voltage will effect the output voltage. If the reference voltage is -5V, the D/A output scaling will be 0~5V. If the reference voltage is -10V, the D/A output scaling will be 0~10V.
Note that the D/A registers are "double
buffered", so that the D/A analog output signals will not be updated until the high byte
is written. When write 12 bits data to D/A registers of the ACL-8216, the low byte must be written before the high byte. This
procedure can insure a single step transition when the D/A conversion.
5.3 Digital Input and Output
To program digital I/O operation is fairly straight forward. The digital input operation is just to read data from the
corresponding registers, and the digital output operation is to write data to the corresponding registers. The digital I/O
registers` format are shown in section 4.9. Note that the DIO data channel can only be read or written in form of 8 bits together. It is impossible to
access individual bit channel.
5.4 Timer/Counter Operation
The ACL-8216 has an interval timer/counter 8254 on board. Refer to section 3.5 for the signal connection and the configuration of the counters.
The 8254 Timer / Counter Chip
The Intel (NEC) 8254 contains three independent, programmable, multi-mode 16 bit counter/timers. The three independent 16
bit counters can be clocked at rates from DC to 5 MHz. Each counter can be individually programmed with 6 different operating
modes by appropriately formatted control words. The most commonly uses for the 8254 in microprocessor based system are:
For more information about the 8254 , please refer to the NEC Microprocessors and peripherals or Intel Microsystems Components Handbook.
Pacer Trigger Source
The counter 1 and counter 2 are cascaded together to generate the timer pacer trigger of A/D conversion. The frequency of
the pacer trigger is software controllable. The maximum pacer signal rate is 2MHz/4=500K which excess the maximum A/D
conversion rate of the ACL-8216. The minimum signal rate is 2MHz/65535/65535, which is a very slow frequency that user may never use it.
General Purpose Timer/ Counter
The counter 0 is free for users' applications. The clock source, gate control signal and the output signal is send to the
connector CN3. The general purpose timer / counter can be used as event counter, or used for measuring frequency, or others functions.
See the `Timer/Counter Applications' section for examples.
I/O Address
The 8254 in the ACL-8216 occupies 4 I/O address as shown below.
| BASE + 0 | LSB OR MSB OF COUNTER 0 |
| BASE + 1 | LSB OR MSB OF COUNTER 1 |
| BASE + 2 | LSB OR MSB OF COUNTER 2 |
| BASE + 3 | CONTROL BYTE |
The programming of 8254 is control by the registers BASE+0 to BASE+3. The functionality of each register is specified this section. For more detailed information, please refer handbook of 8254 chip.
Control Byte
Before loading or reading any of these individual counters, the control byte (BASE+3) must be loaded first. The format of the
control byte is :
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| - | SC1 | SC0 | RL1 | RL0 | M2 | M1 | M0 | BCD |
· SC1 & SC0 - Select Counter ( Bit7 & Bit 6)
| SC1 | SC0 | COUNTER |
| 0 | 0 | Select Counter 0 |
| 0 | 1 | Select Counter 1 |
| 1 | 0 | Select Counter 2 |
| 1 | 1 | ILLEGAL |
· RL1 & RL0 - Select Read/Load operation ( Bit 5 & Bit 4)
| RL1 | RL0 | OPERATION |
| 0 | 0 | COUNTER LATCH FOR STABLE READ |
| 0 | 1 | READ/LOAD LSB ONLY |
| 1 | 0 | READ/LOAD MSB ONLY |
| 1 | 1 | READ/LOAD LSB FIRST, THEN MSB |
· M2, M1 & M0 - Select Operating Mode ( Bit 3, Bit 2, & Bit 1)
| M2 | M1 | M0 | M0DE |
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 |
| x | 1 | 0 | 2 |
| x | 1 | 1 | 3 |
| 1 | 0 | 0 | 4 |
| 1 | 0 | 1 | 5 |
· BCD - Select Binary/BCD Counting ( Bit 0)
| 0 | 16-BITS BINARY COUNTER |
| 1 | BINARY CODED DECIMAL (BCD) COUNTER (4 DIGITAL) |
NoteThe count of the binary counter is from 0 up to 65,535 and the count of the BCD counter is from 0 up to 9,999
Mode Definitions
In 8254, six operating modes can be selected. they are :
All detailed description of these six modes are written in Intel Microsystems Components Handbook Volume II Peripherals.
6. Calibration & Utilities
In data acquisition process, how to calibrate your measurement devices to maintain its accuracy is very important. Users
can calibrate the analog input and analog output channels under the users' operating environment for optimizing the accuracy.
This chapter will guide you to calibrate your ACL-8216 to an accuracy condition.
6.1 What do you need
Before calibrating your ACL-8216 card, you should prepare some equipment's for the calibration:
There are five variable resistors (VR) on the ACL-8216 board to allow you making accurate adjustment on A/D and D/A channels. The function of each VR is specified as Table 7.1.
| VR1 | A/D full scale adjustment |
| VR2 | A/D bipolar offset adjustment |
| VR3 | D/A reference voltage adjustment |
| VR4 | A/D programmable amplifier offset adjustment |
| VR5 | D/A channel 1 full scale adjustment |
| VR6 | D/A channel 2 full scale adjustment |
Table 7.1 Function of VRs
6.3 A/D Adjustment
Note : When the user trims the VR1 and VR2, it will have side effect on the D/A converted data, so repeat the step 4 and step 5
are very important issue for A/D calibration.
6.4 D/A Adjustment
There are two steps to calibrate the analog output channels, D/A 1 and D/A 2. The first step is to adjust the reference voltage, and the
second step is to adjust each channel of D/A.
6.4.1 Reference Voltage Calibration
Trim the variable resister VR3 to obtain -5V reading in the DVM.
Note: If the reference voltage set as -10V, the connection is the same as -5V, but the reading from DVM should be -10V.
6.4.2 D/A Channel Calibration
D/A CH1 calibration :
D/A CH2 calibration :
A calibration utility is supported in the software diskette which is included in the product package. The detailed
calibration procedures and description can be found in the utility. Users only need to run the software calibration utility
and follow the procedures. You will get the accurate measure data.
Appendix A I/O Port Address Map
| I/O Address | Device |
| 000-01F | DMA controller 1 |
| 020-03F | interrupt controller |
| 040-05F | Timer |
| 060-06F | Keyboard |
| 070-07F | Real-time clock |
| 080-09F | DMA page register |
| 0A0-0BF | interrupt controller 2 |
| 0C0-0DF | DMA controller |
| 0F0-0FF | Math coprocessor |
| 100-1EF | not usable |
| 1F0-1F8 | Fixed disk |
| 200-207 | Game I/O |
| 278-27F | Parallel printer port 2 ( LPT2: ) |
| 2F8-2FF | Serial Port 2 ( COM2: ) |
| 300-31F | Prototype card |
| 360-36F | Reserved |
| 378-37F | Parallel printer port 1 ( LPT1: ) |
| 3B0-3BF | Monochrome display |
| 3C0-3CF | Reserved |
| 3D0-3DF | Color graphics display |
| 3F0-3F7 | Diskette controller |
| 3F8-3FF | Serial port 1 ( COM 1: ) |
The low-level programming can be carried out by either assembly or high-level language such as BASIC or C language. The following gives examples to show how to use programming language to access a DAS card or any add-on I/O card.
Getting Started
Before programming, the add-on card should be correctly installed. After installing the card, the users should already understand how much system (PC) resources are used by this card, such as I/O address, IRQ channel, DMA channel, etc.
The second step is to study the register format and the operation theorem of the card. Then users can try to write low-level programs to operate it. Although the high-level program library may be available, the low-level programming can improve the efficiency and perform functions which the library does not support. It is necessary to understand it.
Programming Language
The programming language to be used is dependent on users' familiarity and the system requirement. No matter what kind of language is used, the user must understand the syntax of the I/O instructions to access the I/O card. The following sections introduce the syntax of the often used programming languages. In each section, the write (output) port instruction and the read (input) port instruction are shown. In the examples, the base address of the I/O card is assume as HEX 320 and the port of the register to be access is BASE+2.
Assembly To write an output port: MOV DX, 322 MOV AL, 2F OUT DX, AL To read an input port MOV DX, 322 IN AL, DX BASIC language To write an output port: 10 BASE=&H320 20 VALUE% = &H2F 30 OUT( BASE+2), VALUE % or 30 OUT( &H322 ), &H2F To read an input port 10 BASE=&H320 20 VALUE=INP( BASE+2) or 20 VALUE=INP( &H322 ) C language (Borland C++) To write an output port: #define BASE 0x320 unsigned int Value=0x2F; outportb( BASE+2 , Value ); or outportb( 0x322 , 0x2F ); To read an input port #define BASE 0x320 unsigned int Value; Value = inportb( BASE+2 ); or Value = inportb( 0x322 ); C language (Microsoft C) To write an output port: #define BASE 0x320 unsigned int Value=0x2F; outp( BASE+2 , Value ); or outp( 0x322 , 0x2F ); To read an input port #define BASE 0x320 unsigned int Value; Value = inp( BASE+2 ); or Value = inp( 0x322 );
Perform Functions
Users should study the operation theorem and the relative data sheet to understand how to operate this card, then use the
low-level programming to perform those functions. Generally, the D/A or DIO control can be easily performed by only a few instructions, it
is very suitable to use the low level programming.
As to the higher level functions such as the interrupt service routines, the DMA control, the FIFO buffer control, etc., user may
use the library or modify the examples to carry them out. However, fully understanding of the PC system is necessary for
certain applications.
Product Warranty/Service
Seller warrants that equipment furnished will be free form defects in material and workmanship for a period of one year from the confirmed date of purchase of the original buyer and that upon written notice of any such defect, Seller will, at its option, repair or replace the defective item under the terms of this warranty, subject to the provisions and specific exclusions listed herein.
This warranty shall not apply to equipment that has been previously repaired or altered outside our plant in any way as to, in the judgment of the manufacturer, affect its reliability. Nor will it apply if the equipment has been used in a manner exceeding its specifications or if the serial number has been removed.
Seller does not assume any liability for consequential damages as a result from our products uses, and in any event our liability shall not exceed the original selling price of the equipment.
The equipment warranty shall constitute the sole and exclusive remedy of any Buyer of Seller equipment and the sole and exclusive liability of the Seller, its successors or assigns, in connection with equipment purchased and in lieu of all other warranties expressed implied or statutory, including, but not limited to, any implied warranty of merchant ability or fitness and all other obligations or liabilities of seller, its successors or assigns.
The equipment must be returned postage-prepaid. Package it securely and insure it. You will be charged for parts and labor if
you lack proof of date of purchase, or if the warranty period is expired.


©1995 Circuit Specialists, Inc.