Integral Linearity Error:

High : Min. +2.0V

High : +2.7V min.@20mA max.

This chapter describes the connector of the PCI-9812/10, the signal connection between the PCI-9812/10 and external devices, and the switch setting for different applications.

The PCI-9812/10 connects to external devices through five BNC connectors and one 10-pin dual-in-line header. Fig. 3.1 shows the location of these connector.

Figure 3.1 Location of connectors

This section describes the characteristics of different input of the PCI-9812/10.

PCI-9812/10 has four analog input channels which are connected through connectors J1 ~ J4. The input impedance and input amplitude range can be changed through solder gap switches. A solder gap switch consists of two cooper pads, the switch can be turned on by soldering these two pads together. All the four channels have the same way to configure their input characteristics, only channels 0 is discussed here. There are 2 solder gap switches, named C0LO (channel 0 low impedance) and C05V (channel 0 5V input), to setup the input characteristics of channel 0. (Please refer to fig. 2.1 in section 2.3)

The corresponding switches and resistors of other channels are shown below:

The external clock 0 (J5) is a sine wave signal which is converted to a TTL signal inside the PCI-9812/10. The input impedance of external clock 0 is 50 ohms and the input level is 2 volts peak-to -peak.

The external clock 1 (JP1 pin 1) is a digital clock. The input impedance is 50 ohms and the input level should be 2.4V ~ 5V into the 50-ohm load.

PCI-9812/10 has four digital input : one external digital trigger (JP1 pin3) and three general purpose digital input (JP1 pin 5, 7, and 9). These input are TTL with 10K-ohm pull down.

The detailed descriptions of the register format and structure of the PCI-9812 are specified in this chapter. This information is quite useful for the programmer who wish to handle the card by low-level program.

In addition, the low level programming syntax is introduced. This information can help the beginners to operate the PCI-9812 in the shortest learning time.

The PCI-9812 functions as 32-bit PCI target device to any master on the PCI bus. It supports burst transfer to memory space by using 32-bit data. So, all data read and write will base on 32-bit data. The Table 4.1 shows the I/O address of each register with respect to the base address. The function of each register also be shown.

The PCI-9812/PCI-9810 has 4 analog input channels, named CH0, CH1, CH2, and CH3. CH0 ~ CH3 can be enabled or disabled by bit 0 ~ 3 of the ADC channel enable register.

Attribute : write only

The ADC sampling clock is generated by feeding the ADC source clock to a clock frequency divider, the output of the frequency divider becomes the sampling clock. The frequency of the ADC sampling clock is :

Attribute : write only

DIV15..0 : The AD clock frequency devisor

--- don't care

The PCI-9812/9810 has five trigger modes : software trigger, post trigger, pre-trigger, middle trigger and delay trigger. The trigger mode register is used to specify which trigger mode is currently used.

Attribute : write only

TRGMOD2..0: Trigger mode

The 5 triger modes are list as the following table:

The trigger condition of the PCI-9812/PCI-9810 includes trigger level and trigger slope. The trigger level is set by this register, and the trigger slope is set by the trigger source register described in the next paragraph.

Attribute : write only

TRGLVL7..0: trigger level

--- : don’t care.

The relationship between the 8-bit trigger level and the trigger voltage is :

PCI-9812/10 supports five trigger sources. They are CH0, CH1, CH2, CH3 and external digital trigger.

Attribute : write only

TRGSLP : trigger slope.

0 : positive slope trigger

1 : negative slope trigger

TRGSRC2..TRGSRC0 : trigger source.

When the external digital trigger is selected, the positive slope trigger equals to rising edge trigger, the negative slope trigger equals to falling edge trigger, and the value of trigger level register is meaningless.

The post trigger counter is a 16-bit down counter. The counter is pre-loaded with the value in post trigger counter register and it will count down on the rising edge of ADC sampling clock after the trigger condition was met. When the count reaches 0, the counter stops. The counter is used to control the delay time in delay trigger mode and to control the post trigger sampling count in middle trigger mode.

Attribute : write only

--- : don't card

This register is used to control the on-board FIFO memory of the PCI-9812/PCI-9810.

Attribute : read

bit 0 -- FIFOIR, FIFO input ready flag.

1 : The FIFO is ready for input (not full).

bit 1 -- FIFOHF, FIFO half full flag.

0 : The FIFO is not half full yet.

1 : The FIFO is at least half full.

bit 2 -- FIFOOR, FIFO output ready flag

1 : The FIFO is ready for output (not empty).

bit 3 -- PTC0, post trigger counter is 0

0 : The post trigger counter is not 0.

1 : The post trigger counter reaches 0.

bit 4 -- TD, trigger detection flag

1 : Trigger is detected.

bit 5 -- ACQ, acquisition flag

1 : The PCI-9812/PCI-9810 is acquiring data.

bit 6..31 -- don't card

This register is used to monitor some status of the PCI-9812/PCI-9810.

Attribute : write

The register enables or disables the ADC acquisition.

bit 31..1 -- don't care

bit 0 -- ACQEN, acquisition enable

The register is used to select the ADC clock source.

bit 31..3 -- don't care

bit 2..1 -- CLKSRC1..0, ADC clock source

bit 0: --- Freq_Sel, Frequency selection.

To operate the PCI-9812, you can by-pass the detailed register structures and via the high level application programming interface (API) to control your PCI-9812 card directly. The software libraries, DOS library for Microsoft C/C++ and Borland C/C++, DLL drivers for Windows 3.11, Win-95 and Win-NT are included in the software diskette. For more detailed information, please refer to the PCI-9812 software utility user‘s manual.

To operate the PCI-9812, users do not need to understand how to write a hardware dependent low-level program. Because it is more complex to control the PCI controller and the information is not described in the manual. We do not recommend users to program its applications based on low-level programming. If user does need to program in low-level programming, you can contact the dealer from whom you purchased the PCI-9812, for further PCI controller programming information.

The operation theorem of the functions on PCI-9812/10 card is described in this chapter. The functions include the A/D conversion and digital I/O. The operation theorem can help you to understand how to manipulate and to program the PCI-9812/10.

Before programming the PCI-9812/10 to perform the A/D conversions, you have to understand the following issues:

For using the A/D converter, uses should know about the propery of the siginal to be measured at first. The users can decide which channels to be used and connect the signals to the PCI-9812/10. In addition, users should define and ocntrol the A/D signal sources, including the A/D channels, A/D gains, and A/D siginal types. Please refer to 5.1.2 for A/D siginal control.

After deciding the A/D siginal aource, the user must decide how to trigger the A/D conversion and define /control the trigger source. The A/D converter will start to convert the siginal to a digital value when a trigger siginal is rising. The PCI-9812/10 provides five trigger modes, please refer to section .

At the ending of A/D conversion, the A/D data is buffered in the FIFO. The FIFO size on PCI_9812/10 is 1K samples.

The A/D data should be transferred into PC’s memory for further using or processing. The CPI-9812/10 uses DMA to transfer the input data to memory. Please refer to section 5.1.

To process A/D data, programmer shouldd know about the A/D data format. Please refer ot section 5.1..

5.3 A/D signal source control

To control the A/D siginal cource, three concepts should be understand, They are siginal type, siginal channel and siginal reange.

There are four channels in SE mode. The channell number is controlled by the ADC Channel Enable Register. Please refer to section.

The proper signal range is important fr data acquisition. The input signal may be saturated if the A/D gain is too large. The resolution of data may be not enough if the signal is small and gain is not enough. The available signal input ranges for 9812/10 are ± 5V and ± 1V.

Performing the trigger acquisition in PCI-9812, the following items have to be specified before DMA operation starts:

The trigger is detected while the trigger event occurs. For Post-trigger and Middle-trigger, the data acquisition is performed after the trigger event; however, the time when the AD conversion starts is 350 ns slower than the time when the trigger is detected. This 350ns delay will have minor effect for high speed data acquisition.

You can use the signal on any analog input channel (CH0, CH1, CH2 or CH3) as the trigger signal for external analog trigger. The trigger conditions for analog triggers are described as follows;

step 1. Place "PCI-9812/10 Utility & Library" diskette into the appropriate 3.5" floppy drive ( A: or B:).

step 2. Type the command

A:\>SETUP or B:\>SETUP

step 3. An installation completed message will be showned on the screen.

int _9812_Initial(int card_number, U16 *op_base_address,

U16 *pt_base_address, U8 *irq_no, U8 *pci_master)

int _9812_Close (int card_number)

PCICardNumErr

PCICardNotInit

int _9812_AD_DMA_Start(int card_number, int ch_cnt, U32 *buff, U32 count)

int _9812_AD_DMA_Status(int card_number, int *status, U32 *count, U32 *start_idx)

int _9812_AD_DMA_Stop(int card_number, U32 *count)

_9812_Set_Clk_Src(int card_number, int clk_src, int ftpci)

int _9812_Set_Clk_Rate(int card_number, U16 clk_div)

int _9812_Set_Trig (int card_number, int trig_mode, int trig_src, int trig_pol, int trig_lvl, U16 post_trig_cnt)