PET-48DIO


Programmable 48-bit DIO


Event, and Timer Board

@Copyright 1996

All Rights Reserved.

Manual second edition 16, January 1995

Manual third edition 10, Feburary 1996

The information in this document is subject to change without prior notice in order to improve reliability, design and function and does not represent a commitment on the part of the manufacturer.

In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages.

This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer.

Trademarks

PET-48DIO is registered trademarks of ADLink Technology Inc., IBM PC is a registered trademark of International Business Machines Corporation.

Other product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies.

Contents

· Chapter 1, "Introduction," gives an overview of the product 9273 features. It also tells you the specification of digital input and output, what is included in the product package, and what you need to use the product.


· Chapter 2. "Installation," gives you the layout of PET-48DIO module, the description of the pins of connectors, the setting of jumpers for different I/O configuration, and the setting of DIP switches for base address.


· Chapter 3, "Control Programming," describes how to program and control the PET-48DIO module. The control programs are designed in the assemble language and C language.

1. Introduction

The PET-48DIO 48-bit Digital Input/Output board provides the following specifications:


_ General Specification


· 48 programmable input / output ports


· High output driving capacity


· Low input loading


· One 16 bits programmable event counter


· One 32 bits programmable timer pacer


· Interrupt IRQ : IRQ3, ..., IRQ15 ( 11 levels jumper selectable)


_ Digital Input


· Logic level 0 : From -0.5 V to 0.8 V


· Logic level 1 : From 2.0 V to 5.0 V


· Input loading : 0.2 mA at 0.4 V


· Input hysteresis : From 0.2 V to 0.4 V


· Respond : 500 KHZ


_ Digital Output


· Current sink of logic level 0 : 24 mA at 0.5 V or 12 mA at 0.4 V


· Current source of logic level 1 : 15 mA at 2.0 V or 3 mA at 2.4V


· Driving capacity : 15 TTL's gate


· Respond : 500 KHZ





_ Programmable Event counter


· Respond : DC to 2 MHZ


· Counter ranger : From 1 to 65536


· Trigger edge : Rising edge or falling edge


_ Programmable Timer Pacer


· Clock frequency : 32.768 KHZ or 2 MHZ


· Frequency divider : Programmable


· Counter : 32-bit ( two 16-bit counters cascaded together)


_ Source of Interrupt


· Event counter count up


· Timer time out


· Input from ports

1.2 What You Have

In addition to this User's Manual, the package includes the following items:

· PET-48DIO 48-bit DIO Event, and Timer Board

If any of these items is missing or damaged, contact the dealer from whom you purchased the product. Save the shipping materials and carton in case you want to ship or store the product in the future.

Note : The software drivers ( DOS, Windows 3.11, and Win95) for the PET-48DIO are included in ACLS-DLL1 package. It is not included in this package.

2. Installation

This chapter describes how to install the PET-48DIO in your PC system. This card has 14 jumpers, 2 connectors and 1 DIP SW, and their positions are shown in the figure 2.1 below.


2.1 Layout of PET-48DIO

Fig 2.1 Layout of PET-48DIO

2.2. Unpacking

Your PET-48DIO card contains sensitive electronic components that can be easily damaged by static electricity.

The card should be done on a grounded anti-static mat. The operator should be wearing an anti-static wristband, grounded at the same point as the anti-static mat.

Inspect the card module carton for obvious damage. Shipping and handling may cause damage to your module. Be sure there are no shipping and handing damages on the module before processing.

After opening the card module carton, extract the system module and place it only on a grounded anti-static surface component side up.

Again inspect the module for damage. Press down on all the socketed IC's to make sure that they are properly seated. Do this only with the module place on a firm flat surface.

Note: DO NOT APPLY POWER TO THE CARD IF IT HAS BEEN DAMAGED.

You are now ready to install your PET-48DIO.

2.3 Jumper and DIP Switch Description

You can change the ACL8112's channels and the base address by setting jumpers and DIP switches on the card. The card's jumpers and switches are preset at the factory. You can change the jumper settings for your own applications.

A jumper switch is closed (sometimes referred to as "shorted") with the plastic cap inserted over two pins of the jumper. A jumper is open with the plastic cap inserted over one or no pin(s) of the jumper.



2.4 Setting Base Address

You can change the PET-48DIO's I/O port address by setting Dual in Line Package switches(SW1)on the board. The board's switches are preset at the factory. Under normal circumstances, you should not need to change the switch settings.

PET-48DIO requires two consecutive address locations in I/O address space. The base address of the PET-48DIO is restricted by the following conditions.

1. The base address must be within the range 000hex to 3FBhex.

2. The base address should not conflict with any PC reserved I/O address. see Appendix A.

3. The base address must not conflict with any add-on card on your own PC. Please check your PC before installing the PET-48DIO.


The PET-48DIO's I/O port base address is selectable by an 8 position DIP switch SW1. The default base address setting is Hex 300 is illustrated as Figure 2.2 below. All possible base addresses for I/O port from Hex 000 to Hex 3FB are described in Table 2.1 on next page.


(A9 A8 A7 A6 A5 A4 A3 A2 A1 )

Figure 2.2 : Default Address Setting

The purpose of SW1, and I/O address setting shows as table.

SW1-1 ----------------- SW1-9	SW 1-10
I / O based address setting	NC

Functionality of SW1

I/O Port Address (Hex)	1 A9	2 A8	3 A7	4 A6	5 A5	6 A4	7 A3	8 A2	9 A1
000-001	ON (0)	ON (0)	ON (0)	ON (0)	ON (0)	ON (0)	ON (0)	ON (0)	ON (0)
002-003	ON (0)	OFF (1)	ON (0)	ON (0)	ON (0)	ON (0)	ON (0)	ON (0)	OFF (1)
004-005	ON (0)	OFF (1)	ON (0)	ON (0)	ON (0)	ON (0)	ON (0)	OFF (1)	ON (0)
:
300-301 (default)	OFF (1)	OFF (1)	ON (0)	ON (0)	ON (0)	ON (0)	ON (0)	ON (0)	ON (0)
:
3FC-3FD	OFF (1)	OFF (1)	OFF (1)	OFF (1)	OFF (1)	OFF (1)	OFF (1)	OFF (1)	ON (0)
3FE-3FF	OFF (1)	OFF (1)	OFF (1)	OFF (1)	OFF (1)	OFF (1)	OFF (1)	OFF (1)	OFF (1)

(*) : default setting
ON : 0 OFF : 1.
A1, ... A9 are correspond to PC address lines.

Table 2.1 I/O Base Adress Table

2.5 Pull-Up and Pull-Down Setting

The input / output ports of PET-48DIO emulate as two Intel 8255 general purpose programmable peripheral interfaces(PPI). Figure 2.2 shows PET-DIO48's I/O ports equally block diagram.

Figure 2.3 I / O port's block diagram

There are six jumpers build-in PET-48DIO for pull up and pull down the I/O ports. The PET-48DIO can pull up PA, PB and PC to +5V, and pull down PA, PB and PC to ground.
A typical application where pull up resistors are used to monitor switch closure.

+5V

Figure 2.4 Pull-up/Pull-Down Network

One network( Figure 2.4) is associated with each group of line. These networks can be quickly connected to a voltage source (pull up) or ground (pull down) through on board jumper setting.

The Pull-Up and Pull-Down configuration of each port is set by the jumper JP1, JP2, JP4, JP6, JP7, and JP9, respectively. The port configuration and its corresponding jumper are listed in below table.

Connector	I/O Port	Jumper
	PB1	JP1
CN1	PC1	JP2
	PA1	JP4
	PB0	JP6
CN2	PC0	JP7
	PA0	JP9

Table 2.2 Jumper for Pull-Up/Pull-Down Setting

( This settting is suitable for JP1, JP2, JP4, JP6, JP7, and JP9)




2.6 Pin-2 & Pin-4 Configuration Setting

Figure 2.5 Connector of CN1 and CN2

The pin-2 and pin-4 of CN1 and CN2 can be configuration as +12V or Ground (GND). The JP3 and JP8 are used for the configuration of CN1 and CN2, respectively. The jumper settings are illustrated as below.

· JP3 for CN1




· JP8 for CN2


2.7 Interrupt IRQ Level Setting

The PET-48DIO can connect to any one of the interrupt lines of the PC I/O channel. The interrupt line is selected by the jumper JP5. If you wish to use the interrupt capability of the PET-48DIO, you must select an interrupt level and place the jumper in the appropriate position to enable the particular interrupt line.

The default interrupt level is IRQ5, which is selected by placing the jumper on the pins in row number 5. Figure 2.6 shows the default interrupt jumper setting IRQ5. You only remove the jumper from IRQ5 to other new pins, if you want to change to another IRQ level.

Note : Be aware that there is no other add-on card shares the same interrupt level at the same system.

Figure 2.6 Default Interrupt Setting

2.8. Timer & Event Interrupt Setting

The PET-48DIO has an interval timer/counter 8253 on board. It offers 3 independent 16-bit programmable down counters; counter 1 and counter 2 are cascaded together for A/D timer pacer trigger of interrupt . and counter 0 is for event counting. Figure 2.7 shows the 8253 timer/counter connection.

Figure 2.7 Block Diagram of 8253 Timer/Counter

· JP10 : Timer Interrupt Setting
The jumper JP10 is used for enable or disable timer interrupt,
and the default jumper setting is illustrated as below.



· JP11 : Event Counting Setting

The JP11 is for enable or disable event counter interrupt, and the mini jumper is for setting.

Note : The PC0 D0 ( first bit of PC0) is event input port of

event counter.




· JP12 : Timer Clock Source Setting

The JP12 is for select timer clock source, and the mini jumper is for setting. The range of timer is depend on clock source, PET-48DIO has two clock sources for timer, and setting range shows as table.

Clock source	Timer setting range
32.768 KHZ	0.000122 sec ~ 131072 sec
2 MHZ	0.000002 sec ~ 2147.4836 sec

The following equation is to calculate timer setting range.





Timer range = 1/(Timer Clock source / (Divide 1* Divide 2))





Divide 1 is loading data of 8253 counter 1.





Divide 2 is loading data of 8253 counter 2.

For example:


Clock source is 32.768 KHZ. Set timer to 0.0122 Sec.





0.0122=1/(32768/(Divide 1*Divide 2))


(Divide 1*Divide 2)=400


Let Divide 1=2-> Hex0002 So Divide 2=200 -> Hex 00C8

2.9. Programmable Interrupt Setting

The PC0D3 and PC0D7 are two real time interrupt input ports. JP13 is for PC0D3 and PC0D7 interrupt control setting, and the mini jumper is for setting.

PC0D3	PCOD7	GENERATE AN INTERRUPT
RISING EDGE	0	YES
FALLING EDGE	0	NO
DON'T CARE	1	NO
0	DON'T CARE	NO
1	FALLING EDGE	YES
1	RISING EDGE	NO

PC0D3 & PC0D7 programmable interrupt table


The PC1D3 and PC1D7 are two real time interrupt input ports. JP14 is for PC1D3 and PC1D7 interrupt control setting, and the mini jumper is for setting.

PC1D3	PC1D7	GENERATE AN INTERRUPT
RISING EDGE	0	YES
FALLING EDGE	0	NO
DON'T CARE	1	NO
0	DON'T CARE	NO
1	FALLING EDGE	YES
1	RISING EDGE	NO

PC1D3 & PC1D7 programmable interrupt table

2.10. Connectors

A 8255 has 24 I / O ports which may be individually programmed in 2 groups of 12 or 3 groups of 8. Figure shows PET-48DIO equally 8255 block diagram.

Figure 2.8 8255 block diagram

· Pin Assignment of CN1

The CN1 is a 50 pins connector for PA1, PB1, PC1 input / output ports connecting, the pins' define shows as CN1 pins' define figure.

CN1 pins' define figure

· Pin Assignment of CN2

The CN2 is a 50 pins connector for PA0, PB0, PC0 input / output ports connecting, the pins' define shows as CN2 pins' define figure.


CN2 pins' define figure

3. Control Programming

The PET-48DIO can emulates MODE 0 of 8255 PPI, and it comes equipped with two 50-pin male IDC connectors that interface with OPTO-22 racks 8, 16, and 24.

The basic function definition of 8255 mode 0 is :

. Two 8-bit I/O ports - PA and PB
. Two nibble-wide ( 4-bit) ports - PC upper and PC lower
. Any ports can be used for both input and output
. Outputs are latched whereas inputs are not latched
. 16 different input/output configurations are available

Two, I/O lines, PC0 is used to generate a hardware interrupt, and PC4 is used to control programmable interrupt.

The I / O of PET-48DIO emulates as one 8255 programmable peripheral interface chip, the control word is to program PA, PB and PC as input port or output port. Table shows the summarize of control word (D0 - D4), and mode states (Mode 0 - Mode 15) .

state (Mode 0 - Mode 15)

3.2 Register Structure

The PET-48DIO needs two bytes of I / O address to operate, the first byte is ports' index select and the second byte is ports' data read/write.

Index Select :	The register is used to define the index of I/O ports. You have to define this value before you read or write data to the I/O port of PET-48DIO. Please refer the I/O port's index values in table 3.2.
Data Read/Write :	This register is used to read or write data to the correspond I/O port which you have defined in the Index Select register.

For example, If you defined the PET-48DIO's I/O port address as 300H, then the index select register is 300H, and Data Read/Write register is 301H.

The relationship of ports' index select and ports' data read / write shows as figure.

The following table is ports' index that set by first I/O address.

PORT SELECT	INDEX	Description
GROUP #0 PA0	0H	EMULATE AS 8255 PA
GROUP #0 PB0	1H	EMULATE AS 8255 PB
GROUP #0 PC0	2H	EMULATE AS 8255 PC
CONTROL WORD GROUP #0	3H	EMULATE AS 8255 CW
GROUP #1 PA1	4H	EMULATE AS 8255 PA
GROUP #1 PB1	5H	EMULATE AS 8255 PB
GROUP #1 PC1	6H	EMULATE AS 8255 PC
CONTROL WORD GROUP #1	7H	EMULATE AS 8255 CW
COUNT1 OF 8253	80H	EVENT COUNTER
TIMER 1 OF 8253	81H	TIMER1 CASCADE WITH TIMER2
TIMER 2 OF 8253	82H	TIMER2 CASCADE WITH TIMER1
8253 CONTROL WORD	83H	Control Word for 8253

Table 3.2 Ports' index table

3.3 Programming for PET-48DIO

According to the description of above sections, you can understand how to program the PET-48DIO easily. Partial of Assembly and C programs will be listed below, and a complete C source program for timer pacer interrupt of PET-48DIO is included.

If you need more high level Application Programming Interface ( API ) library in C Language, you can get it from our software package ACLS-DLL1. Both Windows DLL driver and DOS software driver of the PET-48DIO will be included in the ACLS-DLL1. Please contact your dealer of ADLink products.

3.3.1 Programming in Assemble

The following parts are example programs written in assemble for reference.

Programming in assemble
The following parts are example programs written by assemble for reference.

To initial I/O ports

MOV DX , INDEX ; DATA OF INDEX SAME AS I/O ; ADDRESS THAT SET BY SW1
MOV AL , CTRL0 ; CTRL0 = 3H
OUT DX , AL ; INDEX TO GROUP 0 CONTROL ; WORD
JMP $+2 ; DELAY
INC DX ; POINT TO DATA READ/WRITE ; ADDRESS
MOV AL , CW50 ; CONTROL WORD REFER TO ; TABLE OF CONTROL WORD
OUT DX , AL ; PROGRAM GROUP 0 I/O
JMP $+2 ; DELAY
DEC DX ; POINT TO INDEX ADDRESS
MOV AL , CTRL1 ; CTRL1 = 7H
OUT DX , AL ; INDEX TO GROUP 1 CONTROL ; WORD
JMP $+2 ; DELAY
INC DX ; POINT TO DATA READ/WRITE ; ADDRESS
MOV AL , CW51 ; CONTROL WORD REFER TO ;TABLE OF CONTROL WORD
OUT DX , AL ; PROGRAM GROUP 1 I/O
JMP $+2

To write the port

MOV DX , INDEX ; DATA OF INDEX SAME AS I /O ; ADDRESS THAT SET BY SW1
MOV AL , CTRL0 ; CTRL0 = 3H
OUT DX , AL ; SET INDEX TO GROUP 0 ; CONTROL WORD
JMP $+2 ; DELAY
MOV DX , DATA ; DATA = INDEX + 1
MOV AL , MOD0 ; 8255 MODE 0 = 0
OUT DX , AL ; WRITE MOD0 TO CTRL0
JMP $+2 ; DELAY
DEC DX ; POINT TO INDEX ADDRESS
MOV AL , PA0 ; PA0 = 0
OUT DX , AL ; INDEX TO PA0
JMP $+2 ; DELAY
INC DX ; POINT TO DATA READ/WRITE ; ADDRESS
MOV AL , 55H ;
OUT DX , AL ; WRITE 55H TO PA0
JMP $+2
DEC DX ;

To access the port

MOV DX , INDEX ; DATA OF INDEX SAME AS I/O ; ADDRESS THAT SET BY SW1
MOV AL , CTRL1 ; CTRL1= 7H
OUT DX , AL ; INDEX TO GROUP1 CONTROL ; WORD
JMP $+2 ; DELAY
INC DX ; POINT TO DATA READ/WRITE ; ADDRESS
MOV AL , MODE15 ; MODE15 = 17H
OUT DX , AL ; WRITE MODE15 TO CTRL1
JMP $+2 ; DELAY
DEC DX ; POINT TO INDEX ADDRESS
MOV AL , PA1 ; PA1 = 4H
OUT DX , AL ; INDEX TO PA1
JMP $+2 ; DELAY
INC DX ; POINT TO DATA READ/WRITE ; ADDRESS
IN AL , DX ; READ PA1
JMP $+2

To initial 8253

MOV DX , INDEX ; DATA OF INDEX SAME AS I/O ; ADDRESS THAT SET BY SW1
MOV AL , CTRL53 ; CTRL53 = 83H
OUT DX , AL ; SET INDEX TO 8253 CONTROL ; WORD
JMP $+2 ; DELAY
INC DX ; POINT TO DATA READ/WRIT ; ADDRESS
MOV AL , CW0 ; CW0 = 00110000B
OUT DX , AL ; 8253 COUNT 0 AS MODE 0: ; INTERRUPT ON TERMINAL ; COUNT
JMP $+2 ; DELAY
MOV AL , CW1 ; CW1 = 01110100B
OUT DX , AL ; 8253 COUNT 1 AS MODE 2: ; RATE GENERATOR
JMP $+2 ; DELAY
MOV AL , CW2 ; CW2 = 10110000B
OUT DX , AL ; 8253 COUNT 2 AS MODE 0: ; INTERRUPT ON TERMINAL ; COUNT
JMP $+2 ; DELAY

To set event counter

MOV DX , INDEX ; DATA OF INDEX SAME AS I/O ; ADDRESS THAT SET BY SW1
MOV AL , C530 ; C530 = 80H
OUT DX , AL ; INDEX TO COUNT 0
JMP $+2 ; DELAY
INC DX ; POINT TO DATA READ/WRITE ; ADDRESS
MOV AL , 32H ; LOAD LEAST BYTE 32H
OUT DX , AL ; LOAD LEAST BYTE
JMP $+2 ; DELAY
MOV AL , 00H ; LOAD MOST BYTE 00H
OUT DX , AL ; LOAD MOST BYTE
JMP $+2

To set timer

MOV DX , INDEX ; DATA OF INDEX SAME AS I/O ; ADDRESS THAT SET BY SW1
MOV AL , C531 ; C531 = 81H
OUT DX , AL ; INDEX TO COUNT 1
JMP $+2 ; DELAY
INC DX ; POINT TO DATA READ/WRITE ; ADDRESS
MOV AL , 30H ; LOAD LEAST BYTE 30H
OUT DX , AL ; LOAD LEAST BYTE
JMP $+2 ; DELAY
MOV AL , 10H ; LOAD MOST BYTE 10H
OUT DX , AL ; LOAD MOST BYTE
JMP $+2 ; DELAY
DEC DX ; POINT TO INDEX ADDRESS
MOV AL , C532 ; C532 = 82H
OUT DX , AL ; INDEX TO COUNT 2
JMP $+2 ; DELAY
INC DX ; POINT TO DATA READ/WRITE ; ADDRESS
MOV AL , 10H ; LOAD LEAST BYTE 10H
OUT DX , AL ; LOAD LEAST BYTE
JMP $+2 ; DELAY
MOV AL , 00H ; LOAD MOST BYTE 00H
OUT DX , AL ; LOAD MOST BYTE
JMP $+2 ; DELAY

To clear and enable interrupt

MOV DX , INDEX ; DATA OF INDEX SAME AS I/O ; ADDRESS THAT SET BY SW1
MOV AL , CTRL0 ; CTRL0 = 3H
OUT DX , AL ; SET INDEX TO GROUP 1 8255 ; CONTROL WORD
JMP $+2 ; DELAY
INC DX ; POINT TO DATA READ/WRITE ; ADDRESS
IN AL , DX ; DUMMY READ TO CLEAR ; AND ENABLE INTERRUPT

3.3.2 Programming in C language

The following parts are example programs written in C language for reference.

Note : These softwares are only partial of complete program, so you can not execute them directly.

To initial I/O port
# define INDEX 0x300 //define same as //address setting
# define DATA 0x301 //data R/W port
# define CW0 0x3 //port 0 control port
# define CW1 0x7 //port 1 control port
# define CWD0 0x0A //0AH refer to 8255 CW //Mode6 Port A & B output,
// Port C input
# define CWD1 0x0B //0BH refer to 8255 CW //Mode7 Port A output,
// Port B & C input
outportb( INDEX,CW0); //point to port0's control word
outportb( DATA,CWD0); //initial port0
outportb( INDEX,CW1); //point to port1's control word
outportb( DATA,CWD1); //initial port 1


To write port
# define INDEX 0x300 //INDEX same as SW //setting
# define DATA 0x301 //data R/W port
# define CW1 0x3 //port 0 CW
# define MOD0 0x0 //8255 mode 0 Port A, B & C
// are output port
#define PA0 0x0 //port A0
#define PB0 0x1 //port B0

outportb(INDEX,CW0); //index to port0 CW
outportb(DATA,MOD0); //initial port0 as //mod 0 for output
outportb(INDEX,PA0); //index to port A0
outportb(DATA,0x55); //output 55H
outportb(INDEX,PB0); //index to port B0
outportb(DATA, 0xFF); //output FFH to Port B0

To access port
# define INDEX 0x300 //INDEX same as SW //setting
# define DATA 0x301 //data R/W port
# define MOD15 0x17 //8255 mode 15
# define PA1 0x4 //PA1 port index
# define CW1 0x7 //port 1 CW

int input; //input data buffer
outportb(INDEX,CW1); //index to port 1 CW
outportb(DATA,MOD15); //initial port 1 as mod //15 for input
outportb(INDEX,PA1); //index to port A 1
input = inportb(DATA); //read PA1


To initial 8253

# define INDEX 0x300 //INDEX same as SW //setting
# define DATA 0x301 //data R/W port
# define CW53 0x83 //8253 control port
# define CWD531 0x30 //8253 counter 1 CW
# define CWD532 0x74 //8253 control 2 CW
# define CWD533 0xB0 //8253 control 3 CW
outportb(INDEX,CW53); //index to 8253 control //port
outportb(DATA,CWD531); //initial counter 1
outportb(DATA,CWD532); //initial counter 2
outportb(DATA,CWD533); //initial counter 3


To set event counter
# define INDEX 0x300 //INDEX same as SW //setting
# define DATA 0x301 //data R/W port
# define CW530 0x80 //event counter index
outportb(INDEX,CW530); //index to counter 1
outportb(DATA,0x32); //write 32H to low byte
outportb(DATA,0x0); //write 0H to high byte

To set timer
# define INDEX 0x300 //INDEX same as SW //setting
# define DATA 0x301 //data R/W port
# define CW531 0x81 //timer 1 index
# define CW532 0x82 //timer 2 index
outportb(INDEX,CW531); //index to timer 1
outportb(DATA,0x30); //write 30H to timer 1 //low byte
outportb(DATA,0x10); //write 10H to timer 1 //high byte
outportb(INDEX,CW532); //index to timer 2
outportb(DATA,0x10); //write 10H to timer 2 //low byte
outportb(DATA,0x00); //write 00H to timer 2 //high byte

3.3.3 A Complete Example Program for Interrupt Handling

/**********************************************************/
/* File name : test.C */
/* Purpose : PET-48DIO TEST Source Code */
/* Date : 06/02/1994 */
/* Version : 1.0 */
/* Programmer : JIM LIU */
/* Configuration : (jumper settings) */
/* JP5 : IRQ5 */
/* JP10 : 1-2 ( Disable) */
/* JP11 : 2-3 ( Enable) */
/* JP13 : 5-6 ( Disable) */
/* JP14 : 5-6 ( Disable) */
/* */
/* Copyright ACLONE Inc. (c) 1994 all right reserved */
/**********************************************************/
#include <dos.h>
#include <conio.h>

/**************************************/
/* Constants Decalerations */
/**************************************/

#define LOBYTE(arg) (*(unsigned char *)&arg)
#define HIBYTE(arg) (*((unsigned char *)&arg + 1))
#define LOWORD(arg) (*(unsigned int *)&arg)
#define HIWORD(arg) (*((unsigned int *)&arg + 1))

/***** Define Relative Addresses *****/
#define CCW 0x83
#define COUNT 0x80
#define TIMER1 0x81
#define TIMER2 0x82
#define PA0 0x0
#define PB0 0x1
#define PC0 0x2
#define CW0 0x3
#define PA1 0x4
#define PB1 0x5
#define PC1 0x6
#define CW1 0x7


/*------- Define 8259 ---------------------------------*/
#define IC8259_1 0x20
#define IC8259_2 0xA0
#define EOI 0x20



/*-------------------------------------------------------*/
#define NO_INIT 0xff
#define INITIALED 0x00
#define IRQ5 0x0d
#define INDEX 0x300
#define DATA 0x301

void interrupt far do_isr(void);
void interrupt (*old_isr)(void);

int Base_addr;
int inter = 0;
/*--------------------------------------------------------*/
void set_counter( unsigned char c)
{
outp( INDEX, CCW);
outp( DATA, 0x30);
outp( INDEX, COUNT);
outp( DATA, c);
outp( DATA, 0x00);
}
unsigned char ia = 0x2;
void interrupt far do_isr()
{
outp( INDEX, PA0);
outp( DATA, ia);
if( ia > 0xbe) ia = 0x0;
ia = ia + 5;
inter = 1;
outp( INDEX, 0x3);
inp( DATA);
outp( IC8259_1, 0x20);
}

/* Timer pacer interval is depend on the value of c1 and c2*/
void set_timer( int c1, int c2)
{
outp( INDEX, CCW);
outp( DATA, 0x76);
outp( DATA, 0xb6);
outp( INDEX, TIMER1);
outp( DATA, LOBYTE(c1));
outp( DATA, HIBYTE(c1));
outp( INDEX, TIMER2);
outp( DATA, LOBYTE(c2));
outp( DATA, HIBYTE(c2));
}
main()
{
unsigned char vb = 0;
unsigned char vc;
clrscr();
/* enable and clear interrupt */
outp( INDEX, 0x3);
inp( DATA);
old_isr = getvect( IRQ5);
setvect( IRQ5, do_isr);
outp( IC8259_1 + 1,( inp( 0x21) & 0xdf));

outp( INDEX, CW0);
outp( DATA, 0x09); /* mode 5 : PA0, PB0 are output */
set_timer(1400,2400);
do
{
if( inter == 1)
{
outp( INDEX, 0x03);
inp( DATA);
printf( " interrupt \n");
inter = 0;
}
}while( kbhit() == 0);
setvect( 0x0d, old_isr);
outp( 0x21, 0xb8);
return( 0);
}

Product Warranty/Service

©1995 Circuit Specialists, Inc.